Embedded Systems Weekly – Issue 36
Issue 36 – 22 January 2016
Hardware
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In this article, Ken Shirriff reverse-engineers the priority encoder in the ARM1 processor. By examining the chip layout provided by the Visual ARM1 project, he has determined how this circuit works and created a schematic.Share on Twitter ∙ Share on Facebook
Perhaps the tolerances on today’s hobbyist machines just aren’t good enough for you, or perhaps the work area is just too cramped. Either way, there are times when an off-the-shelf solution just wont fit your needs, and you resolve to build your own CNC machine.Share on Twitter ∙ Share on Facebook
Software
Software updates for embedded devices are typically deployed as full image updates. There are many design considerations take into account in the partition table layout to enable full image updates.Share on Twitter ∙ Share on Facebook
This application note has presented a method for transferring data securely to an Atmel AVR microcontroller with bootloader capabilities. This document has also highlighted techniques that should be implemented when building a secured system.Share on Twitter ∙ Share on Facebook
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This document describes Intel Memory Protection Extensions (Intel MPX), its motivation, and programming model. It also describes the enabling requirements and the current status of enabling in the supported OSs: Linux* and Windows* and compilers: Intel C++ Compiler, GCC, and Visual C++*. Finally, the paper describes how ISVs can incrementally enable bounds checking in their Intel MPX applications.Share on Twitter ∙ Share on Facebook
Misc
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In-kernel ROP (Return Oriented Programming) is a useful technique that is often used to bypass restrictions associated with non-executable memory regions. The goal of this tutorial is to demonstrate how a kernel ROP chain can be constructed to elevate user privileges.Share on Twitter ∙ Share on Facebook
Photo by Tim Garlick